Modular sockets using flexible interconnects

ABSTRACT

A modular bare die socket assembly is provided for attaching a plurality of miniature semiconductor die to a substrate. The socket assembly is comprised of a plurality of two-sided plates joined vertically in a horizontal stack, wherein each plate has a die socket for the removable insertion of a bare semiconductor die. A multi-layer interconnect lead tape has a plurality of lithographically formed leads bent on one end to form nodes for attachment to bond pads on the removably inserted semiconductor die, and having opposing ends connectable to the substrate.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of application Ser. No. 11/050,100,filed Feb. 3, 2005, pending, which is a divisional of application Ser.No. 10/401,199, filed Mar. 27, 2003, pending, which is a continuation ofapplication Ser. No. 10/158,979, filed May 30, 2002, now U.S. Pat. No.6,612,872, issued Sep. 2, 2003, which is a continuation of applicationSer. No. 09/876,805, filed Jun. 7, 2001, now U.S. Pat. No. 6,478,627,issued Nov. 12, 2002, which is a continuation of application Ser. No.09/487,935, filed Jan. 20, 2000, now U.S. Pat. No. 6,319,065, issuedNov. 20, 2001, which is a continuation of application Ser. No.09/072,260, filed May 4, 1998, now U.S. Pat. No. 6,089,920, issued Jul.18, 2000.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates generally to methods and apparatus forelectrically connecting semiconductor devices to circuit boards. Moreparticularly, the invention relates to a socket into which one or morebare semiconductor dice may be inserted for connection to a circuitboard without wire bonding of the contact pads of the semiconductor die.

2. State of the Art

The assembly of a semiconductor device from a leadframe andsemiconductor die ordinarily includes bonding of the die to a paddle ofthe leadframe, and wire bonding bond pads on the die to inner leads,i.e., lead fingers of the leadframe. The inner leads, semiconductor die,and bond wires are then encapsulated, and extraneous parts of theleadframe are excised, forming outer leads for connection to a substratesuch as a printed wiring board (PWB).

The interconnection of such packaged integrated circuits (IC) withcircuit board traces has advanced from simple soldering of package leadsto the use of mechanical sockets, also variably known as connectors,couplers, receptacles and carriers. The use of sockets was spurred bythe desire for a way to easily connect and disconnect a packagedsemiconductor die from a test circuit, leading to zero-insertion-force(ZIF), and low-insertion-force (LIF) apparatus. Examples of such arefound in U.S. Pat. No. 5,208,529 of Tsurishima et al., U.S. Pat. No.4,381,130 of Sprenkle, U.S. Pat. No. 4,397,512 of Barraire et al., U.S.Pat. No. 4,889,499 of Sochor, U.S. Pat. No. 5,244,403 of Smith et al.,U.S. Pat. No. 4,266,840 of Seidler, U.S. Pat. No. 3,573,617 of Randolph,U.S. Pat. No. 4,527,850 of Carter, U.S. Pat. No. 5,358,421 of Petersen,U.S. Pat. No. 5,466,169 of Lai, U.S. Pat. No. 5,489,854 of Buck et al.,U.S. Pat. No. 5,609,489 of Bickford et al., U.S. Pat. No. 5,266,833 ofCapps, U.S. Pat. No. 4,995,825 of Korsunsky et al., U.S. Pat. Nos.4,710,134 and 5,209,675 of Korsunsky, U.S. Pat. No. 5,020,998 of Ikeyaet al., U.S. Pat. No. 5,628,635 of Ikeya, U.S. Pat. No. 4,314,736 ofDemnianiuk, U.S. Pat. No. 4,391,408 of Hanlon et al., and U.S. Pat. No.4,461,525 of Griffin.

New technology has enabled the manufacture of very small high-speedsemiconductor dice having large numbers of closely spaced bond pads.However, wire bonding of such semiconductor dice is difficult on aproduction scale. In addition, the very fine wires are relativelylengthy and have a very fine pitch, leading to electronic noise.

In order to meet space demands, much effort has been expended indeveloping apparatus for stack-mounting of packaged dice on a substratein either a horizontal or vertical configuration. For example,vertically oriented semiconductor packages having leads directlyconnected to circuit board traces are shown in U.S. Pat. No. 5,444,304of Hara et al., U.S. Pat. No. 5,450,289 of Kweon et al., U.S. Pat. No.5,451,815 of Taniguchi et al., U.S. Pat. No. 5,592,019 of Ueda et al.,U.S. Pat. No. 5,619,067 of Sua et al., U.S. Pat. No. 5,635,760 ofIshikawa, U.S. Pat. No. 5,644,161 of Burns, U.S. Pat. No. 5,668,409 ofGaul, and U.S. Reissue Pat. Re. 34,794 of Farnworth.

However, none of the above patents relate to the socket interconnectionof a bare (i.e., unpackaged) semiconductor die to a substrate such as acircuit board.

Sockets also exist for connecting daughter circuit boards to a motherboard, as shown in U.S. Pat. No. 5,256,078 of Lwee et al. and U.S. Pat.No. 4,781,612 of Thrush. U.S. Pat. No. 4,501,461 and Re. 28,171 ofAnhalt show connectors for connecting a socket to a circuit board, andwiring to an electronic apparatus, respectively.

U.S. Pat. No. 5,593,927 of Farnworth et al. discloses a semiconductordie having an added protective layer and traces, and which is insertableinto a multi-die socket. The conductive edges of the semiconductor dieare connected through an edge “connector” to circuit board traces. Thenumber of insertable semiconductor dice is limited by the number ofsemiconductor die compartments in the socket, and using fewer dice is awaste of space.

BRIEF SUMMARY OF THE INVENTION

A modular bare die socket is provided by which any number of bare(unpackaged) semiconductor die having bond pads along the edge of onemajor side may be interconnected with a substrate in a densely packedarrangement. The socket is particularly applicable to high speed, e.g.,300 MHZ die of small size or those die of even faster speeds.

The socket comprises a plurality of plates which have a semiconductordie slot structure for aligning and holding a bare die or dice in avertical orientation, and interconnect structure for aligning andretaining a multi-layer lead tape in contact with conductive bond padsof an inserted die. The interconnect lead tapes have outer ends whichare joined to conductive traces on a substrate such as a printed wiringboard (PWB).

Each lead tape includes a node portion which is forced against a bondpad to make resilient contact therewith. Various means for providing thecontact force include a resilient lead tape, an elastomeric layer ormember biasing the lead tape, or a noded arm of the plate, to which thelead tape is fixed.

A multi-layer interconnect lead tape may be formed from a single layerof polymeric film upon which a pattern of fine pitch electricallyconductive leads is formed. Methods known in the art for forming leadframes, including negative or positive photoresist optical lithography,may be used to form the lead tape. The lead tape may be shaped underpressure to the desired configuration.

The plates with intervening interconnect lead tapes are bonded togetherwith adhesive or other means to form a permanent structure.

The plates are formed of an electrically insulative material and may beidentical. Each plate has “left side structure” and “right sidestructure” which work together with the opposing structure of adjacentplates to achieve the desired alignment and retaining of thesemiconductor die and the lead tape for effective interconnection.

Any number of plates may be joined to accommodate the desired number ofbare semiconductor dice. Assembly is easily and quickly accomplished. Ifdesired, end plates having structure on only one side may be used to capthe ends of the socket.

Thus, a socket is formed as a dense stack of semiconductor die-retainingplates by which the footprint per semiconductor die is much reduced.

The modular socket is low in cost and effectively provides the desiredinterconnection. A short interconnect lead distance is achieved, leadingto reduced noise. The impedance may be matched up to the contact orsemiconductor die.

The primary use of the modular bare semiconductor die socket is intendedto be for permanent attachment to circuit boards of electronic equipmentwhere die replacement will rarely be required. Although the socket maybe used in a test stand for temporarily connecting dice during testing,new testing techniques performed at the wafer scale generally obviatethe necessity for such later tests.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

The invention is illustrated in the following figures, wherein theelements are not necessarily shown to scale:

FIG. 1 is a perspective view of a modular socket of the invention;

FIG. 2 is a perspective view of partially assembled modules of a modularsocket of the invention;

FIG. 3 is a cross-sectional edge view of a portion of a modular socketof the invention, as generally taken along line 3-3 of FIG. 1 and havingan exploded portion;

FIG. 4 is a perspective view of a multi-layer lead tape useful in amodular bare die socket of the invention;

FIG. 5 is a plan view of a multi-layer lead tape useful in a modularbare die socket of the invention;

FIG. 5A is a plan view of another embodiment of a multi-layer lead tapeof a modular bare die socket of the invention;

FIG. 6 is a perspective view of a further embodiment of a multi-layerlead tape of a modular bare semiconductor die socket of the invention;

FIG. 7 is a perspective view of partially assembled modules of a furtherembodiment of a modular bare semiconductor die socket of the invention;

FIG. 8 is a perspective view of partially assembled modules of anadditional embodiment of a modular bare semiconductor die socket of theinvention;

FIG. 9 is a cross-sectional edge view of a portion of a furtherembodiment of a modular bare semiconductor die socket of the invention,as taken along line 3-3 of FIG. 1, and having an exploded portion;

FIG. 10 is a cross-sectional edge view of a portion of anotherembodiment of a modular bare semiconductor die socket of the invention,as taken along line 3-3 of FIG. 1;

FIG. 11 is a view of a semiconductor die for use in the modular baresemiconductor die socket of FIG. 10;

FIG. 12 is a view of the semiconductor die of FIG. 11 used in themodular bare semiconductor die socket of FIG. 10; and

FIG. 13 is a view of an alternative embodiment of the semiconductor dieand modular bare semiconductor die socket of FIG. 12 illustrating amodified lead tape.

DETAILED DESCRIPTION OF THE INVENTION

As depicted in drawing FIG. 1, a modular bare die socket 10 of theinvention comprises a plurality of modules 12A, 12B and 12C formed ofplates 14A, 14B, 14C, and 14D which are stacked perpendicular to asubstrate 16. A bare (unpackaged) semiconductor die 18 with conductivebond pads (not visible) near one edge on a major surface 20 thereof,e.g., the “active surface” may be inserted as shown into a die slot 22and have its bond pads interconnected to conductive traces (not visible)on the surface 24 of the substrate 16.

The internal structures of plates 14C and 14D are depicted in drawingFIG. 2. Each of the plates 14A, 14B, 14C and 14D has a first side 26 andan opposing second side 28. The plates have first ends 30 having dieslots 22, and second ends 32 having lead slots 44 through which leadtapes pass.

In these figures, the first side 26 is taken as the left side of eachplate and the second side 28 is taken as the right side. The regularplates 14A, 14B and 14C have structures on both sides 26, 28 and may bethe exclusive plates of the socket 10. The structure provides foraccommodating bare semiconductor die 18 of a particular size, number andspacing of bond pads, etc., and for electrically interconnecting thesemiconductor die 18 to a substrate 16. Typically, all regular plates14A, 14B, 14C of a bare die socket 10 are identical but in some casesmay differ to accommodate semiconductor dice of different size, bond padconfiguration, etc., within different modules 12A, 12B, 12C, etc., of asocket.

Alternatively, one or two end plates 14D may be used to cap any numberof intervening regular plates 14A, 14B and 14C. In contrast to theregular plates 14A, 14B and 14C, such end plates 14D have cooperatingstructure on one side only, i.e., the internal side, and may simply havea flat exterior side which in drawing FIGS. 1, 2 and 3 is the secondside 28. Specifically designed end plates 14D may be used on either,neither or both ends of the socket 10, and have structure on one side tocomplement the facing side of the adjacent regular plate 14A, 14B, 14C.

The structure of the second side 28 of the regular plates 14A, 14B and14C is shown as including an upwardly opening die slot 22 with a sidewall 34, edge walls 38, and stop end wall 36 of lower beam 40. Lowerbeam 40 has an exposed surface 42 which is one side of an interconnectlead slot 44. The lower beam 40 is shown as having a width 41 exceedingwidth 46 for accommodating means for accurate alignment and retention ofa multi-layer interconnect lead tape 50, not shown in drawing FIG. 2 butto be described later in relation to drawing FIGS. 3 through 6.

The first sides 26 of plates 14A, 14B, 14C and 14D are as shown withrespect to end plate 14D. In this embodiment, first side 26 is largelyflat with a recess 48 for accommodating portions of the interconnectlead tape. Recess 48 has a width 60 which is shown to approximate thewidth 46 of the die slot 22, and has a depth 62 which is sufficient totake up the lead tape 50 when it is compliantly moved into the recessupon insertion of a semiconductor die 18 into die slot 22.

The module 12C including the first side of plate 14D and the second sideof plate 14C has alignment posts 52 and matching holes 54 for aligningthe plates 14C, 14D to each other. Also shown are alignment/retentionposts 56 and matching holes 58 for (a) aligning and retaining aninterconnect lead tape 50 in the module, and for (b) aligning the plates14C, 14D with each other. The posts 52, 56 and matching holes 54, 58together comprise a module alignment system.

Mating portions of adjacent plates are joined by adhesive followinginstallation of the lead tape 50 on alignment/retention posts 56. Eachof the posts 52, 56 is inserted into holes 54, 58 so that all of theplates 14A, 14B, 14C and 14D are precisely aligned with each other toform a monolithic socket 10. In drawing FIG. 3, all of the regularplates 14A, 14B, and 14C are identical.

In the views of drawing FIGS. 3 through 5A, a multi-layer interconnectlead tape 50 is shown as comprised of a first insulative layer 64, witha second layer 66 of conductive leads 70A-70C fixed to it. The firstinsulative layer 64 may be formed of a film of polymeric material suchas polyimide, polyimide siloxane, or polyester. A second conductivelayer 66, typically of metal, is formed on the first insulative layer 64in the form of individual leads 70A, 70B, 70C, etc. Methods well-knownin the industry for producing multi-layer lead frames may be used forforming the fine pitch leads 70 on the first insulative layer 64. Thus,for example, the leads 70 may be formed by combining metal depositionwith optical lithography using either a positive or negative photoresistprocess. Any method capable of providing fine pitch leads 70 on thefirst insulative layer 64 of the lead tape 50 may be used.

The lead tape 50 has an upper portion 72 which is configured with atotal width 76 of leads 70 which generally spans the semiconductor die18, but will be less than width 46 of die slot 22 (see FIG. 2). A lowerportion 74 has a greater width 78 which may correspond generally towidth 41 of the lower beam 40 (see FIG. 2). Alignment apertures 80, 82are formed in the lower portion 74 to be coaxial along axes 84, 86,respectively, with alignment/retention posts 56.

The upper portion 72 includes lead portions which contact the bond pads90 of the dice. The lower portion 74 includes lead portions which arejoined to substrate 16.

In the embodiments of drawing FIGS. 3, 4, 5 and 5A, the lead tape 50 isshown as being formed in the general shape of the letter “S.” A contactnode 88 is formed in each lead 70 in the upper portion 72 by forming theupper portion as a bend. The node 88 is configured to be pushed away bycontact with a bond pad 90 of a semiconductor die. The resistance tobending of the lead produces compression therebetween and enablesconsistent electrical contact with the bond pad 90 of a semiconductordie. Where the surfaces of the bond pads 90 of the semiconductor die 18are essentially coplanar, contact between the bond pads 90 and the leads70 is maintained. The compressive force between the semiconductor die 18and the leads 70 is dependent upon the particular material of firstinsulative layer 64 and its thickness, the thickness and material ofsecond conductive layer 66, and lead displacement from the unbiasedposition which results from die insertion. Typically, the firstinsulative layer 64 may vary in thickness from about 12 to about 300 μm.The preferred thickness of the second conductive layer 66 is about 25 toabout 75 μm. The total thickness of the combined first and second layersof the lead tape 50 is preferred to be from about 75 μm to about 100 μm.

The lower ends 92 of leads 70 are shown as bent to a nearly horizontalposition for surface attachment to a substrate 16.

The lower ends 92 are shown as having the first insulative layer 64removed to provide a metal surface for attachment by soldering or othermethod to a substrate 16.

In a variation of the lead tape 50 shown in drawing FIG. 5A, the upperends of the leads 70, i.e., the leads in the upper portion 72, may haveboth the first insulative layer 64 and second conductive layer 66removed between the leads, thereby singulating them. Each lead 70retains both layers 64, 66 for retaining a required resistance tobending in each lead. Thus, each lead is independently compliant withrespect to an inserted semiconductor die 18 to retain conductive contactwith a bond pad 90 on the semiconductor die 18.

An alternative embodiment of the interconnect lead tape 50 is depictedin drawing FIG. 6. The lower ends 92 of leads 70 are bent in theopposite direction from drawing FIGS. 5 and 5A and in addition, thefirst insulative layer 64 is not removed from the lower ends 92.

The lead tape 50 may be bent to the desired shape by a suitable stampingtool or the like, wherein the “at-rest” shape is uniform from tape totape.

The placement of the module components, i.e., the die slot 22, lowerbeam 40, interconnect lead slot 44, and recess 48 may be varied in thelongitudinal direction 94 (see FIG. 3) of the plates, and may beapportioned in any convenient way between the first side 26 of one plateand the facing second side 28 of an adjacent plate.

Turning now to drawing FIGS. 7, 8 and 9, several other embodiments ofthe modular socket 10 are illustrated. As depicted in drawing FIG. 7, aplurality of regular plates 14A, 14B and 14C and an end plate 14D, theplates providing for an interconnect lead tape 50 using a compressibleelastomeric member 96 (not shown) to bias the tape to the bond pads 90of the semiconductor die 18. The elastomeric member 96 may be formed ofsilicone foam, solid silicone that has been perforated, or low durometerhardness silicone which is attached to the tape by adhesive. Theelastomeric member 96 may be variably shaped as a narrow strip 96A withlimited biasing strength to a more general coverage 96B with greaterbiasing strength. Both are illustrated in drawing FIG. 9. The narrowstrip 96A is intended to be used in the module design of drawing FIG. 7,and the general coverage 96B may be used in the module embodiment ofdrawing FIG. 8, wherein sufficient space is provided in the interconnectlead slot 44 for the elastomeric member 96. Preferably, the elastomericmember 96 comprises a single continuous unit extending across all of theleads 70. Alternatively, a series of elastomeric members 96 may bearrayed on the tape 50.

Referring to drawing FIG. 10, illustrated is another form of theinvention, in which the compliant member of a module 12 comprises aprojecting portion 100 of the plate 14. The projecting portion 100 maybe in the form of a ledge, as shown in the figure, and includes alongitudinal ridge 102 within a recess 48 in the first side 26. Amulti-layer interconnect lead tape is attached, e.g., by adhesive, tothe projecting portion 100 and ridge 102. The resulting node 104 in thelead tape 50 is forced away by an inserted die 18 and forcibly abuts thebond pads on the die surface 20. The force holding the leads 70 againstinserted bond pads 90 of a semiconductor die 18 will depend upon thedistance 106 from the node 104 to the attachment point 108 of the ridge102. In order to provide the desired effect, the polymeric material ofthe plate 14 and projecting portion 100 is selected in combination withdistance 106 and ledge thickness 110. In this embodiment, it isunnecessary for the lead tape 50 to be aligned and retained on alignmentposts.

Where a bare semiconductor die 18 has two rows of bond pads 90,illustrated in drawing FIG. 11 as first row 112 and second row 114, thelead tape 50 of the modular socket 10 may be adapted for lead contactwith both rows. A lead tape 50 for providing contact with two rows 112,114 of bond pads 90 is shown in drawing FIG. 12. The tape 50 comprisesthree layers including a first insulative layer 64, a second conductivelayer 66 for contacting the first row 112 of bond pads 90, and a thirdconductive layer 68 for contacting the second row 114 of bond pads onthe die 18. The first and second layers 64, 66 are terminated atlocations 116, 118, respectively, between the first and second rows 112,114 of bond pads. An elastomeric member 96C such as a foam is attachedto the third layer 68 and abuts the recess wall 120. The member 96C iscompressed by insertion of the semiconductor die 18 into the socket andretains forced contact between the leads and bond pads.

As shown in drawing FIG. 13, the first (insulative polymer) layer 64 mayalternatively be provided with holes 122 through which individual leads70 of the third (conductive) layer 68 are pre-inserted for contact withthe second row 114 of bond pads 90.

The foregoing delineates several examples of the use of a multi-layerlead tape with means for contacting the bond pads of a bare die. Othertypes of biasing apparatus may be used for maintaining contact betweeninterconnect leads 70 and the bond pads 90 of a semiconductor die 18,including mechanical springs suitable for the miniature devices.

The plates 14A, 14B, 14C, 14D, etc., may be molded of a suitableinsulative polymeric material, examples of which include polyethersulfone, polyether ether ketone (PEEK), or polyphenylene sulfide.

Following assembly of the modular socket 10 and attachment to asubstrate 16, the modular socket, or portions thereof, may be“glob-topped” with insulative sealant material, typically a polymer.

The socket 10 of the invention permits connection of bare semiconductordice with very fine pitch bond pads to substrates, whereby short leadsare used for improved performance. The semiconductor dice may be readilyreplaced without debonding of wires or other leads. Multiplesemiconductor dice may be simultaneously connected to a substrate, andthe apparatus permits high density “stacking” of a large number of dice.The socket uses leads which may be produced by well-developedtechnology, and is easily made in large quantity and at low cost.

It is apparent to those skilled in the art that various changes andmodifications may be made to the bare die socket module of theinvention, sockets formed therefrom and methods of making and practicingthe invention as disclosed herein without departing from the spirit andscope of the invention as defined in the following claims. It isparticularly noted that with respect to numbers and dimensions ofelements, the illustrated constructions of the various embodiments ofthe modular bare semiconductor die socket are not presented as alimiting list of features but as examples of the many embodiments of theinvention.

1. A connector for a semiconductor die having a plurality of bond padson at least one surface thereof and a substrate comprising: two plateseach having a first side, a second side, a first end, and a second end,the first side of a first plate located adjacent the second side of asecond plate for forming a die socket having a die slot at a first endthereof and having a lead slot at a second end thereof; a tape includingconductive leads formed on a portion of a film of insulation, at leastone of conductive leads having an inner end for resiliently contactingthe at least one bond pad of the bare semiconductor die and having anouter end for contacting a substrate; biasing apparatus for engaging theinner end of the at least one conductive lead into resilient contactwith the at least one bond pad of the bare semiconductor die; and athird plate located adjacent one of the first plate and the second platefor forming a second die socket.
 2. The connector of claim 1, whereinthe die slot and the lead slot are located in the first plate and thesecond plate of the two plates when the first plate and the second plateare abutted at the first end and the second end, respectively, of eachplate, the lead slot offset from the die slot.
 3. Apparatus forconnecting a semiconductor die having a plurality of bond pads on atleast one surface thereof and a substrate comprising: two plates eachhaving a first side, a second side, a first end, and a second end, thefirst side of a first plate located adjacent the second side of a secondplate for forming a die socket having a die slot at a first end thereofand a lead slot at a second end thereof; a tape including conductiveleads formed on a portion of an insulation film having at least oneconductive lead having an inner end for resiliently contacting at leastone bond pad of the bare semiconductor die and having an outer end forcontacting a portion of the substrate; biasing apparatus for engagingthe inner end of the at least one conductive lead into resilient contactwith the at least one bond pad of the bare semiconductor die; and athird plate located adjacent one of the first plate and the second platefor forming a second die socket.
 4. The apparatus of claim 3, whereinthe die slot and the lead slot are located in the first plate and thesecond plate of the two plates when the first plate and the second plateare abutted at the first end and the second end, respectively, of eachplate, the lead slot offset from the die slot.
 5. A vertical connectorfor connecting a semiconductor die having a plurality of bond pads on atleast one surface thereof and a substrate comprising: two plates eachhaving a first side, a second side, a first end, and a second end, thefirst side of a first plate located adjacent the second side of a secondplate for forming a die socket having a die slot at a first end thereofand having a lead slot at a second end thereof; a tape including atleast one lead formed on a portion of a film having an inner end forresilient electrical contact with the plurality of bond pads of one ofthe bare semiconductor die and an outer end for contacting a substrate;apparatus for engaging the inner end of the at least one conductive leadinto resilient contact with the at least one bond pad of thesemiconductor die; and a third plate located adjacent one of the firstplate and the second plate for forming a second die socket.
 6. Thevertical connector of claim 5, wherein the die slot and the lead slotare located in the first plate and the second plate of the two plateswhen the first plate and the second plate are abutted at the first endand the second end, respectively, of each plate, the lead slot offsetfrom the die slot.
 7. A method of forming a module for the insertion ofsemiconductor die thereinto and connecting said semiconductor die to asubstrate having conductor thereon, said semiconductor die having aplurality of conductive bond pads on a surface thereof, said methodcomprising: providing a first plate having first and second major sideswith corresponding first and second ends; providing a second platehaving first and second major sides with corresponding first and secondends; providing a multi-layer interconnect lead tape including a patternof electrically conductive leads formed on an insulative film, saidconductive leads having inner ends for resilient electrical contact withbond pads of said semiconductor die and outer ends for electricalcontact with said conductors on said substrate; providing resilientapparatus; abutting the second major side of said first plate and thefirst major side of said second plate thereby forming a bare die sockethaving a die slot at the first ends of said first plate and said secondplate and a lead slot at the second ends of said first plate and saidsecond plate, the first ends of said multi-layer interconnect lead tapeextending between the second major side of said first plate and thefirst major side of said second plate and the second ends of saidmulti-layer interconnect lead tape extending beyond the second ends ofsaid first plate and said second plated.
 8. The method of claim 7,further comprising: resiliently biasing the firs ends of saidmulti-layer interconnect lead tape.
 9. The method of claim 7, furthercomprising: contacting the second ends of said multi-layer interconnectlead tape with the conductors on said substrate.
 10. The method of claim7, further comprising: providing a third plate having a first and secondmajor sides and corresponding first and second ends; and abutting thefirst major side of said third plate with the second major side of saidsecond plate thereby forming another bare die socket.
 11. A method offorming a module for the insertion of semiconductor die thereinto andconnecting said semiconductor die to a substrate having conductorthereon, said semiconductor die having a plurality of conductive bondpads on a surface thereof, said method comprising: providing a firstplate having first and second major sides with corresponding first andsecond ends; providing a second plate having first and second majorsides with corresponding first and second ends; providing a multi-layerinterconnect lead tape including a pattern of electrically conductiveleads formed on an insulative film, said conductive leads having innerends for resilient electrical contact with bond pads of saidsemiconductor die and outer ends for electrical contact with saidconductors on said substrate; providing resilient apparatus; abuttingthe second major side of said first plate and the first major side ofsaid second plate thereby forming a bare die socket having a die slot atthe first ends of said first plate and said second plate and a lead slotat the second ends of said first plate and said second plate, the firstends of said multi-layer interconnect lead tape extending between thesecond major side of said first plate and the first major side of saidsecond plate and the second ends of said multi-layer interconnect leadtape extending beyond the second ends of said first plate and saidsecond plated.
 12. The method of claim 11, further comprising:resiliently biasing the firs ends of said multi-layer interconnect leadtape.
 13. The method of claim 11, further comprising: contacting thesecond ends of said multi-layer interconnect lead tape with theconductors on said substrate.
 14. The method of claim 11, furthercomprising: providing a third plate having a first and second majorsides and corresponding first and second ends; and abutting the firstmajor side of said third plate with the second major side of said secondplate thereby forming another bare die socket.
 15. A multi-layerinterconnect tape for interconnecting the bond pads of a semiconductordie to a substrate, said tape comprising: a first layer of insulativefilm having first and second surfaces; a second layer of conductivematerial formed on a first surface of said insulative film;
 16. Theinterconnect tape of claim 15, wherein said conductive material ismetal.
 17. The interconnect tape of claim 15, wherein said second layeris formed as a plurality of conductive leads having first endsconfigured to abut said bond pads of said semiconductor die and secondends for connection to conductive traces of a substrate.
 18. Theinterconnect tape of claim 15, wherein said tape is bent to form nodesin said conductive leads for contact with said bond pads of saidsemiconductor die.
 19. The interconnect tape of claim 15, wherein saidtape is abutted against said bond pads of said semiconductor die by aresilient member.
 20. The interconnect tape of claim 19, wherein saidresilient member comprises an elastomeric member fixed to said firstlayer.
 21. The interconnect tape of claim 19, wherein said resilientmember comprises a bendable extension of an apparatus holding said tape.22. The interconnect tape of claim 21, wherein said resilient membercomprises said first layer of said tape.
 23. The interconnect tape ofclaim 15, further comprising a third layer of conductive material formedon said second surface of said first layer and extending past saidsecond layer for contact with additional bond pads of said semiconductordie, said additional bond pads being located in another row of bond padson said semiconductor die from a first portion of said bond pads of saidsemiconductor die.
 24. A plate for adapted for abutting an anotheradjacent plate to form an interconnect socket for a semiconductor diefor connection of a substrate, said plate comprising: a generally planarmember formed of an insulative material, said plate having a first sideand a second side, a first end and a second end; said second sideincluding a recessed die slot for insertion of a bare die from saidfirst end; said first side including a recess for holding aninterconnect lead tape for resilient contact with said die and asubstrate; and whereby a second side of one said plate abutted to thefirst side of said another adjacent plate to forms a module forremovable insertion of a semiconductor die for electricalinterconnection to said substrate.
 25. The plate according to claim 24,wherein one side of said recessed die slot comprises of a wall of saidsecond side of said another adjacent plate.
 26. The plate according toclaim 24, wherein an interconnect lead tape is positioned and retainedbetween a first side of said plate and a second side of a secondadjacent plate.
 27. The plate according to claim 24, further comprising:alignment posts fixed to said second side for aligning/retaining passagethrough said interconnect lead tape.
 28. The plate according to claim24, wherein said plate and another adjacent plate are alignedsubstantially perpendicular to said substrate.